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00087 #if defined(zgbl230)
00088 # define BOARD_TYPE ZGB_LINK_230
00089 # define BOARD_NAME_ZGBL "zgbl230"
00090 # define RADIO_TYPE (RADIO_AT86RF230B)
00091 #elif defined(zgbl231)
00092 # define BOARD_TYPE ZGB_LINK_231
00093 # define BOARD_NAME_ZGBL "zgbl231"
00094 # define RADIO_TYPE (RADIO_AT86RF231)
00095 #elif defined(zgbl212)
00096 # define BOARD_TYPE ZGB_LINK_212
00097 # define BOARD_NAME_ZGBL "zgbl212"
00098 # define RADIO_TYPE (RADIO_AT86RF212)
00099 #elif defined(zgbh230)
00100 # define BOARD_TYPE ZGB_LINK_230
00101 # define BOARD_NAME_ZGBL "zgbh230"
00102 # define RADIO_TYPE (RADIO_AT86RF230B)
00103 # define ZGBL_EVM_HOST (1)
00104 #elif defined(zgbh231)
00105 # define BOARD_TYPE ZGB_LINK_231
00106 # define BOARD_NAME_ZGBL "zgbh231"
00107 # define RADIO_TYPE (RADIO_AT86RF231)
00108 # define ZGBL_EVM_HOST (1)
00109 #elif defined(zgbh212)
00110 # define BOARD_TYPE ZGB_LINK_212
00111 # define BOARD_NAME_ZGBL "zgbh212"
00112 # define RADIO_TYPE (RADIO_AT86RF212)
00113 # define ZGBL_EVM_HOST (1)
00114 #endif
00115
00116 #ifndef BOARD_ZGBL_H
00117 #define BOARD_ZGBL_H
00118
00119 #define BOARD_NAME BOARD_NAME_ZGBL
00120
00121
00122 #ifndef MAX_FRAME_SIZE
00123 # define MAX_FRAME_SIZE (127)
00124 #endif
00125
00126
00127 #include "base_rdk2xx.h"
00128
00129 static inline void xmem_init(void)
00130 {
00131 XMCRA |= _BV(SRE);
00132 XMCRB |= _BV(XMBK);
00133 }
00134
00135
00136
00137 #ifndef ZGBL_EVM_HOST
00138 # define NO_KEYS (1)
00139 #else
00140
00141 # define KEY_IO_AD (0x4000)
00142 # define PIN_KEY (*(volatile uint8_t*)(KEY_IO_AD))
00143 # define xDDR_KEY DDRE
00144 # define MASK_KEY (0x1)
00145 # define SHIFT_KEY (0)
00146 # define INVERSE_KEYS (0)
00147 # define PULLUP_KEYS (0)
00148 # define KEY_INIT xmem_init
00149 #endif
00150
00151 #ifndef ZGBL_EVM_HOST
00152 # define NO_LEDS (1)
00153 #else
00154
00155
00156
00157
00158
00159
00160
00161
00162 #define MASK_LED0 (_BV(6))
00163 #define PORT_LED0 PORTB
00164 #define DDR_LED0 DDRB
00165 #define MASK_LED1 (_BV(7))
00166 #define PORT_LED1 PORTD
00167 #define DDR_LED1 DDRD
00168
00169 #define LED_INIT() \
00170 do { \
00171 DDR_LED0 |= MASK_LED0; \
00172 DDR_LED1 |= MASK_LED1; \
00173 PORT_LED0 &= ~MASK_LED0; \
00174 PORT_LED1 |= MASK_LED1;\
00175 } while (0)
00176
00177 #define LED_SET(x) \
00178 switch (x) { \
00179 case 0: PORT_LED0 &= ~MASK_LED0; break; \
00180 case 1: PORT_LED1 &= ~MASK_LED1; break; \
00181 }
00182
00183 #define LED_CLR(x) \
00184 switch (x) { \
00185 case 0: PORT_LED0 |= MASK_LED0; break; \
00186 case 1: PORT_LED1 |= MASK_LED1; break; \
00187 }
00188
00189 #define LED_SET_VALUE(x) \
00190 do { \
00191 if (x & 1) PORT_LED0 &= ~MASK_LED0; else PORT_LED0 |= MASK_LED0; \
00192 if (x & 2) PORT_LED1 &= ~MASK_LED1; else PORT_LED1 |= MASK_LED1; \
00193 } while (0)
00194
00195 #define LED_GET_VALUE() ( \
00196 ((PORT_LED0 & MASK_LED0)? 0: 1) | \
00197 ((PORT_LED1 & MASK_LED1)? 0: 2) \
00198 )
00199
00200 #define LED_VAL(msk,val) do{}while(0)
00202 #define LED_TOGGLE(ln) \
00203 switch (ln) { \
00204 case 0: PORT_LED0 ^= MASK_LED0; break; \
00205 case 1: PORT_LED1 ^= MASK_LED1; break; \
00206 }
00207
00208 #define LED_NUMBER (2)
00209
00210 #endif
00211
00212
00213
00214
00215
00216
00217
00218
00219
00220
00221
00222
00223
00224 #define SLEEP_ON_KEY_INIT() do{}while(0)
00225 #define SLEEP_ON_KEY() do{}while(0)
00226
00227
00228 #define HIF_TYPE (HIF_UART_1)
00229
00230
00231 #define HWTMR_PRESCALE (1)
00232 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00233 #define HWTIMER_TICK_NB (0xFFFFUL)
00234 #define HWTIMER_REG (TCNT1)
00235 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
00236 #define TIMER_POOL_SIZE (4)
00237 #define TIMER_INIT() \
00238 do{ \
00239 TCCR1B |= (_BV(CS10)); \
00240 TIMSK1 |= _BV(TOIE1); \
00241 }while(0)
00242 #define TIMER_IRQ_vect TIMER1_OVF_vect
00243
00244
00245
00246 #ifndef TUNED_OSCCAL
00247 # define TUNED_OSCCAL (0xbf)
00248 #endif
00249 #endif