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00072 #define BOARD_NAME_TINY230 "tiny230"
00073 #ifndef BOARD_TINY230_H
00074 #define BOARD_TINY230_H
00075
00076 #define BOARD_TYPE (TINY_230)
00077 #define BOARD_NAME BOARD_NAME_TINY_230
00079
00080 #ifndef MAX_FRAME_SIZE
00081 # define MAX_FRAME_SIZE (127)
00082 #endif
00083
00084 #ifndef DEFAULT_SPI_RATE
00085 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00086 #endif
00087
00088
00089 #define CPU_TYPE (CPU_T44)
00090 #ifndef RADIO_TYPE
00091 #define RADIO_TYPE (RADIO_AT86RF230B)
00092 #endif
00093
00094
00095
00096 #define DDR_TRX_RESET DDRB
00097 #define PORT_TRX_RESET PORTB
00098 #define MASK_TRX_RESET (_BV(PB0))
00099
00100
00101
00102 #define PORT_TRX_SLPTR PORTB
00103 #define DDR_TRX_SLPTR DDRB
00104 #define MASK_TRX_SLPTR (_BV(PB1))
00105
00106
00107
00108
00109 # define TRX_IRQ _BV(INT0)
00110 # define TRX_IRQ_vect INT0_vect
00113 # define TRX_IRQ_INIT() do{\
00114 MCUCR = _BV(ISC00) | _BV(ISC01);\
00115 GIMSK |= _BV(INT0);\
00116 } while(0)
00119 #define DI_TRX_IRQ() {GIMSK &= (~(TRX_IRQ));}
00120
00121 #define EI_TRX_IRQ() {GIMSK |= (TRX_IRQ);}
00122
00124 #define TRX_TSTAMP_REG TCNT1
00125
00126
00127 #define SPI_TYPE SPI_TYPE_USI
00128 #define DDR_SPI (DDRA)
00129 #define PORT_SPI (PORTA)
00131 #define SPI_MOSI _BV(PA5)
00132 #define SPI_MISO _BV(PA6)
00133 #define SPI_SCK _BV(PA4)
00134 #define SPI_SS _BV(PA7)
00136 #define SPI_DATA_REG USIDR
00142 static inline void SPI_INIT(uint8_t spirate)
00143 {
00144
00145 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00146 DDR_SPI &= ~SPI_MISO;
00147 PORT_SPI |= SPI_SS | SPI_MISO;
00148 }
00149
00151 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00152
00153 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00154
00155 #define SPI_WAITFOR() \
00156 do \
00157 { \
00158 USISR = _BV(USIOIF); \
00159 do \
00160 { \
00161 USICR = _BV(USIWM0)|_BV(USICS1)|_BV(USICLK)|_BV(USITC); \
00162 } while ((USISR & _BV(USIOIF)) == 0); \
00163 } while(0)
00164
00165
00166 #define LED_PORT PORTA
00167 #define LED_DDR DDRA
00168 #define LED_MASK (0x03)
00169 #define LED_SHIFT (0)
00170 #define LEDS_INVERSE (0)
00172 #define LED_NUMBER (2)
00175
00176
00177 #define PORT_KEY PORTA
00178 #define PIN_KEY PINA
00179 #define DDR_KEY DDRA
00180 #define MASK_KEY (0x04)
00181 #define SHIFT_KEY (2)
00182 #define INVERSE_KEYS (1)
00184 #define PULLUP_KEYS (1)
00185
00186 #define SLEEP_ON_KEY_INIT() \
00187 do{\
00188 PCMSK0 |= _BV(PCINT2);\
00189 }while(0)
00190
00191 #define SLEEP_ON_KEY() \
00192 do{\
00193 GIMSK |= _BV(PCIE0);\
00194 set_sleep_mode(SLEEP_MODE_PWR_DOWN);\
00195 sleep_mode();\
00196 GIMSK &= ~_BV(PCIE0);\
00197 } while(0)
00198
00199 #define SLEEP_ON_KEY_vect PCINT0_vect
00200
00201
00202
00204 #define HIF_TYPE HIF_NONE
00205
00206
00207 #define HWTMR_PRESCALE (1)
00208 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00211 #define HWTIMER_TICK_NB (0xffffUL)
00213 #define HWTIMER_REG (TCNT1)
00215 #define TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB)
00216
00219 #define TIMER_POOL_SIZE (1)
00222 #define TIMER_INIT() \
00223 do{\
00224 TCCR1B |= _BV(CS10);\
00225 TIMSK1 |= _BV(TOIE1);\
00226 }while(0)
00227
00229 #define TIMER_IRQ_vect TIM1_OVF_vect
00230
00231
00232 #ifndef TUNED_OSCCAL
00233 # define TUNED_OSCCAL (0xbf)
00234 #endif
00235 #endif