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00081 #if defined(lgee231)
00082 # define BOARD_NAME_LGEE231 "littleGee"
00083 # define BOARD_TYPE (LITTLE_GEE_231)
00084 # define BOARD_NAME BOARD_NAME_LGEE231
00085 # define RADIO_TYPE (RADIO_AT86RF231)
00086 # define BOARDVERSION (3)
00087 #elif defined(lgee231_v2)
00088 # define BOARD_NAME_LGEE231 "littleGee_v2"
00089 # define BOARD_TYPE (LITTLE_GEE_231)
00090 # define BOARD_NAME BOARD_NAME_LGEE231
00091 # define RADIO_TYPE (RADIO_AT86RF231)
00092 # define BOARDVERSION (2)
00093 #endif
00094
00095 #ifndef BOARD_LGEE231_H
00096 #define BOARD_LGEE231_H (1)
00097
00098 #ifndef MAX_FRAME_SIZE
00099 # define MAX_FRAME_SIZE (127)
00100 #endif
00101
00102 #ifndef DEFAULT_SPI_RATE
00103 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00104 #endif
00105
00106
00107 #define CPU_TYPE (CPU_M88)
00109
00110
00111 #if BOARDVERSION == 2
00112
00113 #define DDR_TRX_RESET DDRC
00114 #define PORT_TRX_RESET PORTC
00115 #define MASK_TRX_RESET (_BV(1))
00116
00117
00118
00119 #define PORT_TRX_SLPTR PORTC
00120 #define DDR_TRX_SLPTR DDRC
00121 #define MASK_TRX_SLPTR (_BV(0))
00122
00123
00124
00125 #elif BOARDVERSION == 3
00126
00127 #define DDR_TRX_RESET DDRC
00128 #define PORT_TRX_RESET PORTC
00129 #define MASK_TRX_RESET (_BV(3))
00130
00131
00132
00133 #define PORT_TRX_SLPTR PORTC
00134 #define DDR_TRX_SLPTR DDRC
00135 #define MASK_TRX_SLPTR (_BV(0))
00136
00137
00138
00139 #else
00140 #error "Unknown BOARDVERSION, set to 2 or 3"
00141
00142 #endif
00143
00144
00145
00146
00147
00148 #if BOARDVERSION == 2
00149
00150 #define ACC_SELN_DDR DDRB
00151 #define ACC_SELN_PORT PORTB
00152 #define ACC_SELN_PIN PINB
00153 #define ACC_SELN_bp (_BV(2))
00154 #define ACC_SELN_ASIN() do{ ACC_SELN_DDR &= ~_BV(ACC_SELN_bp); }while(0)
00155 #define ACC_SELN_ASOUT() do{ ACC_SELN_DDR |= _BV(ACC_SELN_bp); }while(0)
00156 #define ACC_SELN_LO() do{ ACC_SELN_PORT &= ~_BV(ACC_SELN_bp); }while(0)
00157 #define ACC_SELN_HI() do{ ACC_SELN_PORT |= _BV(ACC_SELN_bp); }while(0)
00158
00159 #elif BOARDVERSION == 3
00160
00161 #define ACC_SELN_DDR DDRD
00162 #define ACC_SELN_PORT PORTD
00163 #define ACC_SELN_PIN PIND
00164 #define ACC_SELN_bp (_BV(6))
00165 #define ACC_SELN_ASIN() do{ ACC_SELN_DDR &= ~_BV(ACC_SELN_bp); }while(0)
00166 #define ACC_SELN_ASOUT() do{ ACC_SELN_DDR |= _BV(ACC_SELN_bp); }while(0)
00167 #define ACC_SELN_LO() do{ ACC_SELN_PORT &= ~_BV(ACC_SELN_bp); }while(0)
00168 #define ACC_SELN_HI() do{ ACC_SELN_PORT |= _BV(ACC_SELN_bp); }while(0)
00169
00170 #else
00171 #error "Unknown BOARDVERSION, set to 2 or 3"
00172
00173 #endif
00174
00175
00176
00177 #if BOARDVERSION == 2
00178
00179 # define TRX_IRQ 0x00
00180 # define TRX_IRQ_vect PCINT2_vect
00183 # define TRX_IRQ_INIT() do{\
00184 PCICR |= _BV(PCIE2); \
00185 } while(0)
00188 #define DI_TRX_IRQ() { PCMSK2 &= ~_BV(PCINT18); }
00189
00190 #define EI_TRX_IRQ() { PCICR |= _BV(PCIE2); PCMSK2 |= _BV(PCINT18); }
00191
00192 #elif BOARDVERSION == 3
00193
00194 # define TRX_IRQ 0x00
00195 # define TRX_IRQ_vect PCINT0_vect
00198 # define TRX_IRQ_INIT() do{\
00199 PCICR |= _BV(PCIE0); \
00200 } while(0)
00203 #define DI_TRX_IRQ() { PCMSK0 &= ~_BV(PCINT1); }
00204
00205 #define EI_TRX_IRQ() { PCICR |= _BV(PCIE0); PCMSK0 |= _BV(PCINT1); }
00206
00207 #else
00208 #error "Unknown BOARDVERSION, set to 2 or 3"
00209
00210 #endif
00211
00212
00214 #define TRX_TSTAMP_REG TCNT1
00215
00216
00217 #define SPI_TYPE SPI_TYPE_SPI
00218 #define DDR_SPI (DDRB)
00219 #define PORT_SPI (PORTB)
00221 #if BOARDVERSION == 2
00222
00223 #define SPI_MOSI _BV(PB3)
00224 #define SPI_MISO _BV(PB4)
00225 #define SPI_SCK _BV(PB5)
00226 #define SPI_SS _BV(PB0)
00228 #elif BOARDVERSION == 3
00229
00230 #define SPI_MOSI _BV(PB3)
00231 #define SPI_MISO _BV(PB4)
00232 #define SPI_SCK _BV(PB5)
00233 #define SPI_SS _BV(PB2)
00235 #else
00236 #error "Unknown BOARDVERSION, set to 2 or 3"
00237
00238 #endif
00239
00240
00241 #define SPI_DATA_REG SPDR
00247 static inline void SPI_INIT(uint8_t spirate)
00248 {
00249
00250 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00251 DDR_SPI &= ~SPI_MISO;
00252 PORT_SPI |= SPI_SCK | SPI_SS;
00253
00254 SPCR = (_BV(SPE) | _BV(MSTR));
00255
00256 SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00257 SPSR &= ~_BV(SPI2X);
00258
00259 SPCR |= (spirate & 0x03);
00260 SPSR |= ((spirate >> 2) & 0x01);
00261
00262 }
00263
00265 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00266
00267 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00268
00269 #define SPI_WAITFOR() do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00270
00271
00272
00273 #if BOARDVERSION == 2
00274
00275 #define LED_PORT PORTD
00276 #define LED_DDR DDRD
00277 #define LED_MASK (0x60)
00278 #define LED_SHIFT (5)
00279 #define LEDS_INVERSE (1)
00281 #define LED_NUMBER (2)
00283 #elif BOARDVERSION == 3
00284
00285 #define LED_PORT PORTC
00286 #define LED_DDR DDRC
00287 #define LED_MASK (0x30)
00288 #define LED_SHIFT (4)
00289 #define LEDS_INVERSE (1)
00291 #define LED_NUMBER (2)
00293 #else
00294 #error "Unknown BOARDVERSION, set to 2 or 3"
00295
00296 #endif
00297
00298
00299
00300 #define NO_KEYS (1)
00302
00303
00304 #if BOARDVERSION == 2
00305 #define HIF_TYPE HIF_NONE
00306 #elif BOARDVERSION == 3
00307 #define HIF_TYPE (HIF_UART_0)
00308 #else
00309 #error "Unknown BOARDVERSION, set to 2 or 3"
00310
00311 #endif
00312
00313
00314 #define HWTMR_PRESCALE (1)
00315 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00316 #define HWTIMER_TICK_NB (0xFFFFUL)
00317 #define HWTIMER_REG (TCNT1)
00318 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
00319 #define TIMER_POOL_SIZE (4)
00320 #define TIMER_INIT() \
00321 do{ \
00322 TCCR1B |= (_BV(CS10)); \
00323 TIMSK1 |= _BV(TOIE1); \
00324 }while(0)
00325 # define TIMER_IRQ_vect TIMER1_OVF_vect
00326
00327
00328 #ifndef TUNED_OSCCAL
00329 # define TUNED_OSCCAL (0xbf)
00330 #endif
00331
00332
00333 #define BOARD_HAS_ACC_MMA7455 (1)
00334 #endif