00001 /* Copyright (c) 2009 Axel Wachtler 00002 All rights reserved. 00003 00004 Redistribution and use in source and binary forms, with or without 00005 modification, are permitted provided that the following conditions 00006 are met: 00007 00008 * Redistributions of source code must retain the above copyright 00009 notice, this list of conditions and the following disclaimer. 00010 * Redistributions in binary form must reproduce the above copyright 00011 notice, this list of conditions and the following disclaimer in the 00012 documentation and/or other materials provided with the distribution. 00013 * Neither the name of the authors nor the names of its contributors 00014 may be used to endorse or promote products derived from this software 00015 without specific prior written permission. 00016 00017 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00018 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00019 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00020 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 00021 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 00022 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 00023 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 00024 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 00025 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00026 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00027 POSSIBILITY OF SUCH DAMAGE. */ 00028 00029 /* $Id: board__derfa_8h-source.html,v 1.1.1.1 2010/01/21 21:37:03 awachtler Exp $ */ 00057 #ifndef BOARD_DERFA_H 00058 #define BOARD_DERFA_H 00059 00060 #define BOARD_TYPE DE_MOD_128RFA1 00061 #define BOARD_NAME_DERFA "derfa1" 00062 #define BOARD_NAME BOARD_NAME_DERFA 00063 00064 /*=== Compile time parameters ========================================*/ 00065 #ifndef MAX_FRAME_SIZE 00066 # define MAX_FRAME_SIZE (127) 00067 #endif 00068 00069 #ifndef DEFAULT_SPI_RATE 00070 # define DEFAULT_SPI_RATE (SPI_RATE_1_2) 00071 //# define DEFAULT_SPI_RATE (SPI_RATE_1_128) 00072 #endif 00073 00074 /*=== Hardware Components ============================================*/ 00075 #define CPU_TYPE (CPU_M128RFA1) 00076 #define RADIO_TYPE (RADIO_ATMEGA128RFA1_C) 00077 00079 #define TRX_TSTAMP_REG TCNT1 00080 00081 #define LED_NUMBER (0) 00082 #define NO_LEDS (1) 00083 #define NO_KEYS (1) 00084 00085 /*=== Host Interface ================================================*/ 00086 #define HIF_TYPE HIF_UART_0 00087 00088 #define TRX_RESET_LOW() do { TRXPR &= ~_BV(TRXRST); } while (0) 00089 #define TRX_RESET_HIGH() do { TRXPR |= _BV(TRXRST); } while (0) 00090 #define TRX_SLPTR_LOW() do { TRXPR &= ~_BV(SLPTR); } while (0) 00091 #define TRX_SLPTR_HIGH() do { TRXPR |= _BV(SLPTR); } while (0) 00092 00093 /*=== TIMER Interface ===============================================*/ 00094 #define HWTMR_PRESCALE (1) 00095 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU) 00096 #define HWTIMER_TICK_NB (0xFFFFUL) 00097 #define HWTIMER_REG (TCNT1) 00098 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK) 00099 #define TIMER_POOL_SIZE (4) 00100 #define TIMER_INIT() \ 00101 do{ \ 00102 TCCR1B |= (_BV(CS10)); \ 00103 TIMSK1 |= _BV(TOIE1); \ 00104 }while(0) 00105 #define TIMER_IRQ_vect TIMER1_OVF_vect 00106 00107 /*=== OSCCAL tuning =================================================*/ 00108 00109 #ifndef TUNED_OSCCAL 00110 # define TUNED_OSCCAL (0xbf) /* default is 0xb1, but @2.9V 0xbf is better */ 00111 #endif 00112 00113 #endif /* BOARD_DERFA_H */