board_stkm16.h

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00001 /* Copyright (c) 2007 Axel Wachtler
00002    All rights reserved.
00003 
00004    Redistribution and use in source and binary forms, with or without
00005    modification, are permitted provided that the following conditions
00006    are met:
00007 
00008    * Redistributions of source code must retain the above copyright
00009      notice, this list of conditions and the following disclaimer.
00010    * Redistributions in binary form must reproduce the above copyright
00011      notice, this list of conditions and the following disclaimer in the
00012      documentation and/or other materials provided with the distribution.
00013    * Neither the name of the authors nor the names of its contributors
00014      may be used to endorse or promote products derived from this software
00015      without specific prior written permission.
00016 
00017    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00018    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00021    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00022    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00023    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00025    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00026    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00027    POSSIBILITY OF SUCH DAMAGE. */
00028 
00029 /* $Id: board__stkm16_8h_source.html,v 1.1.1.4 2013/04/09 21:12:09 awachtler Exp $ */
00070 #ifndef BOARD_STK_M16_H
00071 #define BOARD_STK_M16_H (1)
00072 
00074 #define BOARD_NAME "stkm16"
00075 
00076 #define BOARD_TYPE  (BOARD_STKM16)
00077 
00078 /*=== Compile time parameters ========================================*/
00079 #ifndef DEFAULT_SPI_RATE
00080 # define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
00081 #endif
00082 
00083 /*=== Hardware Components ============================================*/
00084 #define RADIO_TYPE (RADIO_AT86RF230)
00085 
00086 /*=== TRX pin access macros ==========================================*/
00087 
00088 #define DDR_TRX_RESET   DDRB
00089 #define PORT_TRX_RESET  PORTB
00090 #define MASK_TRX_RESET  (_BV(PB0))
00091 #define TRX_RESET_INIT() DDR_TRX_RESET |= MASK_TRX_RESET
00092 #define TRX_RESET_HIGH() PORT_TRX_RESET |= MASK_TRX_RESET
00093 #define TRX_RESET_LOW()  PORT_TRX_RESET &= ~MASK_TRX_RESET
00094 
00095 #define PORT_TRX_SLPTR  PORTB
00096 #define DDR_TRX_SLPTR   DDRB
00097 #define MASK_TRX_SLPTR  (_BV(PB3))
00098 
00099 #define TRX_SLPTR_INIT() DDR_TRX_SLPTR |= MASK_TRX_SLPTR
00100 #define TRX_SLPTR_HIGH() PORT_TRX_SLPTR |= MASK_TRX_SLPTR
00101 #define TRX_SLPTR_LOW()  PORT_TRX_SLPTR &= ~MASK_TRX_SLPTR
00102 
00103 
00104 /*=== IRQ access macros ==============================================*/
00105 #if 1
00106 # define TRX_IRQ         _BV(INT2)
00107 # define TRX_IRQ_vect    INT2_vect
00108 # define TRX_IRQ_INIT()  do{\
00109                             MCUCSR  |= _BV(ISC2);\
00110                           } while(0) 
00111 #else
00112 # define TRX_IRQ         _BV(INT0)
00113 # define TRX_IRQ_vect    INT0_vect
00114 # define TRX_IRQ_INIT()  do{\
00115                             MCUCR  |= _BV(ISC01) | _BV(ISC00);\
00116                           } while(0) 
00117 #endif
00118 
00119 #define DI_TRX_IRQ() {GICR &= (~(TRX_IRQ));}
00120 #define EI_TRX_IRQ() {GICR |= (TRX_IRQ);}
00121 
00123 #define TRX_TSTAMP_REG TCNT1
00124 
00125 /*=== SPI access macros ==============================================*/
00126 #define DDR_SPI  (DDRB)
00127 #define PORT_SPI (PORTB)
00128 
00129 #define SPI_MOSI _BV(PB5)
00130 #define SPI_MISO _BV(PB6)
00131 #define SPI_SCK  _BV(PB7)
00132 #define SPI_SS   _BV(PB4)
00133 
00134 #define SPI_DATA_REG SPDR
00135 
00136 
00137 
00138 static inline void SPI_INIT(uint8_t spirate)
00139 {
00140     /* first configure SPI Port, then SPCR */
00141     PORT_SPI |= SPI_SCK | SPI_SS;
00142     DDR_SPI  |= SPI_MOSI | SPI_SCK | SPI_SS;
00143     DDR_SPI  &= ~SPI_MISO;
00144 
00145     SPCR = (_BV(SPE) | _BV(MSTR));
00146 
00147     SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00148     SPSR &= ~_BV(SPI2X);
00149 
00150     SPCR |= (spirate & 0x03);
00151     SPSR |= ((spirate >> 2) & 0x01);
00152 
00153 }
00154 
00155 #define SPI_SELN_LOW()       uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00156 #define SPI_SELN_HIGH()      PORT_SPI |= SPI_SS; SREG = sreg
00157 #define SPI_WAITFOR()        do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00158 
00159 /*=== LED access macros ==============================================*/
00160 #define LED_PORT      PORTA
00161 #define LED_DDR       DDRA
00162 #define LED_MASK      (0xf0)
00163 #define LED_SHIFT     (4)
00164 #define LEDS_INVERSE  (1)
00165 
00166 /*=== KEY access macros ==============================================*/
00167 #define PORT_KEY       PORTA
00168 #define PIN_KEY        PINA
00169 #define DDR_KEY        DDRA
00170 #define MASK_KEY       (0x0f)
00171 #define SHIFT_KEY      (0x00)
00172 #define INVERSE_KEYS   (0)
00173 #define LED_NUMBER     (4)
00174 /*=== Host Interface ================================================*/
00175 #define HIF_TYPE    HIF_UART_0
00176 
00177 /*=== TIMER Interface ===============================================*/
00178 #define HWTMR_PRESCALE  (8)
00179 #define HWTIMER_TICK    ((1.0*HWTMR_PRESCALE)/F_CPU)
00180 #define HWTIMER_TICK_NB (1000UL)
00181 #define HWTIMER_REG     (TCNT1)
00182 #define TIMER_TICK      (HWTIMER_TICK_NB * HWTIMER_TICK)
00183 # define TIMER_POOL_SIZE  (4)
00184 /*
00185  * Mode: CTC
00186  * Prescaler: 8 / Mode 4, CTC mit OCR1A = 1000
00187  * @ F_CPU = 8MHz this results in 1ms timer tick IRQ's.
00188  */
00189 # define TIMER_INIT() \
00190     do{ \
00191         TCCR1B |= (_BV(CS11) | _BV(WGM12)); \
00192         TIMSK |= _BV(OCIE1A); \
00193         OCR1A = 1000; \
00194     }while(0)
00195 
00196 # define TIMER_IRQ_vect   TIMER1_COMPA_vect
00197 
00198 /* application settings for sniffer */
00199 #define UART_RXBUFSIZE (32)
00200 #define UART_TXBUFSIZE (128)
00201 #define MAX_PACKET_BUFFERS (2)
00202 
00203 #endif /* BOARD_STK_M16_H*/

This documentation for µracoli was generated on Tue Apr 9 2013 by  doxygen 1.7.1