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00087 #if defined(psk230)
00088 # define BOARD_TYPE (BOARD_PSK230)
00089 # define BOARD_NAME "psk230"
00090 # define RADIO_TYPE (RADIO_AT86RF230A)
00091 #elif defined(psk230b)
00092 # define BOARD_TYPE (BOARD_PSK230B)
00093 # define BOARD_NAME "psk230b"
00094 # define RADIO_TYPE (RADIO_AT86RF230B)
00095 #elif defined(psk231)
00096 # define BOARD_TYPE (BOARD_PSK231)
00097 # define BOARD_NAME "psk231"
00098 # define RADIO_TYPE (RADIO_AT86RF231)
00099 #elif defined(psk212)
00100 # define BOARD_TYPE (BOARD_PSK212)
00101 # define BOARD_NAME "psk212"
00102 # define RADIO_TYPE (RADIO_AT86RF212)
00103 #elif defined(psk232)
00104 # define BOARD_TYPE (BOARD_PSK232)
00105 # define BOARD_NAME "psk232"
00106 # define RADIO_TYPE (RADIO_AT86RF232)
00107 #elif defined(psk233)
00108 # define BOARD_TYPE (BOARD_PSK233)
00109 # define BOARD_NAME "psk233"
00110 # define RADIO_TYPE (RADIO_AT86RF233)
00111 #endif
00112
00113 #ifndef BOARD_STK541_H
00114 #define BOARD_STK541_H
00115
00116
00117 #ifndef DEFAULT_SPI_RATE
00118 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00119 #endif
00120
00121
00122 #if BOARD_TYPE == BOARD_PSK230 || BOARD_TYPE == BOARD_PSK230B
00123 # include "base_rdk230.h"
00124 #else
00125 # include "base_rdk2xx.h"
00126 #endif
00127
00128
00129 #define LED_PORT PORTE
00130 #define LED_DDR DDRE
00131 #define LED_MASK (0x1c)
00132 #define LED_SHIFT (2)
00133 #define LEDS_INVERSE (1)
00134 #define LED_NUMBER (3)
00135
00136 #define PORT_KEY PORTE
00137 #define PIN_KEY PINE
00138 #define DDR_KEY DDRE
00139 #define MASK_KEY (0x20)
00140 #define SHIFT_KEY (5)
00141 #define INVERSE_KEYS (1)
00142 #define PULLUP_KEYS (1)
00143
00144
00145 #define HIF_TYPE (HIF_FT245)
00146 #define HIF_IO_ENABLE XRAM_ENABLE
00147
00148 #define USB_FIFO_AD 0xF000
00149 #define HIF_USB_READ() (*(volatile uint8_t*)(USB_FIFO_AD))
00150 #define HIF_USB_WRITE(x) do { (*(volatile uint8_t*)(USB_FIFO_AD)) = (x); }while(0)
00151 #define XRAM_ENABLE() do {\
00152 DDRC = 0xFF;\
00153 PORTC = 0x00;\
00154 XMCRA |= (1 << SRE);\
00155 XMCRB = (1 << XMBK);\
00156 } while(0)
00157
00158 #define HIF_NO_DATA (0x0100)
00159 #define FT245_DDR DDRE
00160 #define FT245_PORT PORTE
00161 #define FT245_PIN PINE
00162 #define FT245_TXE _BV(6)
00163 #define FT245_RXF _BV(7)
00164 #define FT245_INIT() do { \
00165 XMCRA |= (1 << SRE); \
00166 XMCRB = (1 << XMBK);\
00167 FT245_DDR &= ~(FT245_TXE|FT245_RXF);\
00168 FT245_PORT |= (FT245_TXE|FT245_RXF);\
00169 } while(0)
00170
00171 #define FT245_TX_IS_BLOCKED() (0 != (FT245_PIN & FT245_TXE))
00172 #define FT245_RX_HAS_DATA() (0 == (FT245_PIN & FT245_RXF))
00173
00174
00175 #define HWTMR_PRESCALE (1)
00176 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00177 #define HWTIMER_TICK_NB (0xFFFFUL+1)
00178 #define HWTIMER_REG (TCNT1)
00179 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
00180 #define TIMER_POOL_SIZE (4)
00181
00183 #define TIMER_IRQ_vect TIMER1_OVF_vect
00184
00194 # define TIMER_INIT() \
00195 do{ \
00196 TCCR1B |= (_BV(CS10));\
00197 TIMSK1 |= _BV(TOIE1); \
00198 }while(0)
00199
00200
00201
00202 # define DBG_PORT PORTD
00203 # define DBG_DDR DDRD
00204 # define DBG_PIN (1<<PD0)
00205
00206 #endif