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00072 #ifndef BOARD_ICT230_H
00073 #define BOARD_ICT230_H
00074 #define BOARD_TYPE (BOARD_ICT230)
00075 #define BOARD_NAME "ict230"
00076
00077
00078 #ifndef DEFAULT_SPI_RATE
00079 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00080 #endif
00081
00082 #ifndef PB0
00083 # define PB0 (0)
00084 # define PB1 (1)
00085 # define PB2 (2)
00086 # define PB3 (3)
00087 # define PB4 (4)
00088 # define PB5 (5)
00089 # define PB6 (6)
00090 # define PB7 (7)
00091 #endif
00092
00093
00094 #define RADIO_TYPE (RADIO_AT86RF230)
00096
00097
00098 #define DDR_TRX_RESET DDRB
00099 #define PORT_TRX_RESET PORTB
00100 #define MASK_TRX_RESET (_BV(PB6))
00101 #define CUSTOM_RESET_TIME_MS (10)
00103 #define PORT_TRX_SLPTR PORTB
00104 #define DDR_TRX_SLPTR DDRB
00105 #define MASK_TRX_SLPTR (_BV(PB5))
00107
00108 # define TRX_IRQ _BV(INT4)
00109 # define TRX_IRQ_vect INT4_vect
00112 # define TRX_IRQ_INIT() do{\
00113 EICRB |= (_BV(ISC41)|_BV(ISC40));\
00114 } while(0)
00117 #define DI_TRX_IRQ() {EIMSK &= (~(TRX_IRQ));}
00118
00119 #define EI_TRX_IRQ() {EIMSK |= (TRX_IRQ);}
00120
00122 #define TRX_TSTAMP_REG TCNT1
00123
00124
00125 #define DDR_SPI (DDRB)
00126 #define PORT_SPI (PORTB)
00128 #define SPI_MOSI _BV(PB2)
00129 #define SPI_MISO _BV(PB3)
00130 #define SPI_SCK _BV(PB1)
00131 #define SPI_SS _BV(PB4)
00133 #define SPI_DATA_REG SPDR
00139 static inline void SPI_INIT(uint8_t spirate)
00140 {
00141
00142 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00143 DDR_SPI |= _BV(PB0);
00144
00145
00146 DDR_SPI &= ~SPI_MISO;
00147 PORT_SPI |= SPI_SCK | SPI_SS;
00148
00149 SPCR = (_BV(SPE) | _BV(MSTR));
00150
00151
00152 SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00153 SPSR &= ~_BV(SPI2X);
00154
00155 SPCR |= (spirate & 0x03);
00156 SPSR |= ((spirate >> 2) & 0x01);
00157
00158 }
00159
00161 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00162
00163 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00164
00165 #define SPI_WAITFOR() do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00166
00167
00168
00169
00170 #define LED_PORT PORTD
00171 #define LED_DDR DDRD
00172 #define LED_MASK (0xc0)
00173 #define LED_SHIFT (6)
00174 #define LEDS_INVERSE (1)
00175 #define LED_NUMBER (2)
00176
00177
00178 #define PORT_KEY PORTD
00179 #define PIN_KEY PIND
00180 #define DDR_KEY DDRD
00181 #define MASK_KEY (0x01)
00182 #define SHIFT_KEY (0)
00183 #define INVERSE_KEYS (1)
00184 #define PULLUP_KEYS (1)
00185
00186
00187 #define HIF_TYPE HIF_UART_1
00188
00189
00190
00191 #define HWTMR_PRESCALE (8)
00192 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00193 #define HWTIMER_TICK_NB (1000UL)
00194 #define HWTIMER_REG (TCNT1)
00195 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
00196 #define TIMER_POOL_SIZE (4)
00197
00206 # define TIMER_INIT() \
00207 do{ \
00208 TCCR1B |= (_BV(CS11) | _BV(WGM12)); \
00209 TIMSK1 |= _BV(OCIE1A); \
00210 OCR1A = 1000; \
00211 }while(0)
00212
00213 # define TIMER_IRQ_vect TIMER1_COMPA_vect
00214
00215 #endif